Instruction Format in Computer Organization

In this tutorial we are going to learn about instruction format in computer organization.

What is Instruction format :

In terms of its basic pieces, instruction format explains the internal structures (layout design) of the bits of an instruction.
An opcode must be there in an Instruction format, and the address is reliant on the availability of specific operands.
The addressing mode for each operand is indicated by the format, which can be implicit or explicit.
The creation of an Instruction format is a difficult task. There are a variety of design concerns that affect instructional design, following are some of them:
Instruction length: The length of the instructions is a fundamental concern in the format design. The longer the command, the longer the time it will take to retrieve it.
The Memory size: If we have to address a wider memory range, additional bits in the address field will be necessary.
Memory organization: If the system supports virtual memory, the memory range that the instruction must address is larger than the actual memory.
Memory transfer length: Instruction length should be equal to or multiples of the data bus length.
Based on the type of CPU structure, instruction formats are divided into five categories. Based on the availability of ALU operands, the CPU has three categories, for instance Single Accumulator organization, General register organization, Stack organization.

Zero Address Instruction Format :

The address field in the instruction is not there in a stack-based computer. ALU operands are only used on stack data in this organization. This means that both ALU operations must be present in the stack at all times. As the destination, the same stack is used. Only one end of the stack, generally referred to as the top of the stack, can be useful for inserting and deleting data. So there is no need for an address in this format because the TOS becomes the default location.

One Address Instruction Format :

For data manipulation, we use an inferred ACCUMULATOR register. One of the ALU operands is always present in the accumulator in this arrangement. The destination is the same accumulator as the source. In the register or memory, another ALU operand is present. Because there is only one accumulator in the CPU, it becomes the default position.

Two Address Instruction Formats :

This is a regular occurrence in commercial computers. The instruction can provide two addresses in this scenario. Unlike in the past, when the result of a single address instruction was there in the accumulator, the result can now be present in numerous locations rather than just accumulators. However this requires a larger number of bits to represent the address. Two Address Instruction Format is the computable instruction format for the register to memory reference CPU.

Three Address Instruction Formats :

This has three address fields, each of which can be useful to indicate a register or memory location. The size of the programs written is significantly less, but the number of bits each instruction is increasing. These instructions make program construction considerably easier. But this does not imply that programs will run faster because each micro operation (changing the content of a register, loading an address into the address bus, etc.) will take a single cycle.

Four Address Instruction Format :

This format includes an opcode for each of the four address fields. Because PC is a necessary register in the CPU design, it is there to store the address of the next instruction. As a result, the four-instruction format is no longer in use.